Xilinx UG492 Manual de usuario descargar pdf (Pagina 90)

90 www.xilinx.com Ethernet AVB Endpoint User Guide

UG492 July 23, 2010

Chapter 10: Configuration and Status

PLB Address Map and Register Definitions

Figure 10-3 displays an overview of the Address Space occupied by the Ethernet AVB

Endpoint core on the PLB. Common across all addressable space, each unique PLB address

value references a single byte of data.

The variable PLB_base_address shown in Figure 10-3 and in the tables that follow

represent the starting (base) address of the AVB core within the entire PLB address space;

this is:

• selected from the CORE Generator™ software Customization GUI (see “PLB Base

Address” in Chapter 4) when the core is generated in “Standard CORE Generator

Format”.

• automatically assigned and configured when the core is generated in “EDK pcore

Format”.

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Xilinx UG492 Manual de usuario Pagina 90